1. Field
Integrated circuit packaging.
2. Background
Integrated circuits chip or die are typically assembled into a package that is soldered to a printed circuit board. A chip or die may have contacts on one surface that are used to electrically connect the chip or die to the package substrate and correspondingly an integrated circuit to the package substrate. Accordingly, a suitable substrate may have corresponding contacts on one surface. One way a number of contacts of a chip or die are connected to contacts of a package substrate are through solder ball contacts in, for example, a controlled collapse chip connect (C4) process.
A package substrate may be constructed from a composite material that has a coefficient of thermal expansion (CTE) that is different than a coefficient of thermal expansion of the chip or die. Variations in the temperature of the package may cause a resultant differential expansion between the chip and the package substrate. The differential expansion may induce stresses that can crack the connections between the chip and the package substrate (e.g., crack one or more solder bumps). The connections carry electrical current between the chip and the package substrate so that any crack in the connections may effect the operation in the circuit.
Typically, a package such as described may include an underfill material that is located between the chip and the package substrate. The underfill material is typically an epoxy that improves the solder joint reliability and also provides mechanical/moisture stability to the package configuration. A package may have hundreds of connections (e.g., solder bumps) arranged in a two-dimensional array across a surface of the chip, between the chip and the substrate package. An underfill is typically applied to the interface of the chip and package substrate by dispensing a line of uncured underfill material along one side of the interface. The underfill then flows between the connections.
A chip or die mounted to a package substrate may be overmolded with a mold compound to provide a level of protection from environmental effects such as moisture and contaminants. A typical overmolding process places a solid or semi-solid molding compound over the chip using a mold press. The package is then transferred through a heated mold that causes the molding compound to flow and encapsulate the chip.
Typical underfill materials and mold compound materials are epoxy based, i.e., epoxy resin. The resin is formed by combining the epoxy with a hardener. Typical hardeners for underfill and mold compound are amine-based systems or phenolic-based systems. A mold compound may also include fillers such as ceramics or silica.
In terms of reliability performance, four properties of an underfill and mold compound materials are generally considered important. These include low CTE, low modulus, adhesion, and high fracture toughness of the cured resin. Methylene diamines as a hardener in epoxy underfill or mold compound have been found to have good adhesion to polyimides and substrates. Toughness for this system is provided by addition of elastomers such as long chain aliphatic silicone-functionalized epoxies. Although the addition of, for example, long chain aliphatic silicone epoxies, improves fracture toughness, the glass transition temperature (Tg) of the resin has been observed to drop with increased addition of the silicone elastomers. The addition of the silicone elastomers are also expected to increase the viscosity of the resin, thus reducing the flow of a resin under a chip as an underfill composition. Finally, the use of methylene-based aromatic diamines must be handled cautiously as these compounds are known carcinogenics.
One problem associated with underfill compositions is that the underfill composition on cure tends to increase the warpage of the package (e.g., a package including chip and package substrate). Warpage has been observed to impact package coplanarity especially on ball grid array (BGA) packages, resulting in stressed joints post reflow. Stressed joints can result in increased solder joint fatigue failures. Also, with the increased die size, more stresses are anticipated, particularly at the die edges. Currently, all packages are expected to meet lead-free soldered reflow requirements. For materials to pass lead-free reflow conditions, high adhesion and low package stress is important.
In the non-central processing unit (CPU) area, stack height of a package is an important parameter. One tendency of the industry is to make packages thinner with more functionality. Decreasing package thickness means developing thinner mold compositions/underfills and less warpage, with better reliability performance.